Because of its inherent reduced capacitance and higher integration density properties trench isolation is often used to isolate semiconductor islands within an integrated circuit architecture. In addition to being used with silicon-on-insulator configurations, trench isolation is also commonly employed with PN junction isolation of the bottom or floor of the island, as diagrammatically illustrated in FIG. 1, which shows an N- island 11 atop an support substrate 12. The sides of island 11 are isolated by means of a trench 13, typically filled with an insulator (oxide) layer 14 and conductor (polysilicon) material.
As trench isolation technology has developed it has been increasingly used to isolate thicker islands, such as those employed for high voltage (e.g. in excess of 30 volts) devices. With the relatively large field gradients in such devices there is the possibility of the formation of a parasitic inversion path 17 beneath the surface oxide layer 18 and along the sidewall of the island 11, which electrically connects a device region, such as P type diffusion region 21 formed in the surface of island 11, with the underlying substrate. Such a parasitic path may be caused, for example, by the gating action of the potential applied to polysilicon material 15 together with the voltage of an interconnect line (not shown) which overlies surface oxide layer 18 between region 21 and trench 13, by the action of negative charge on and/or in the surface and sidewall oxide layers, or by a combination of charge and gate bias. High voltage islands are particularly prone to the problem since they use higher resistivity material, which has a lower inversion threshold voltage than lower resistivity material, to achieve a higher breakdown voltage. In addition, the higher voltages present on the conductors cause the parasitic devices to turn on.
One technique to circumvent the inversion problem is to use a channel stop, which, for a high voltage junction, typically takes the form of a diffusion, such as diffusion region 31 shown in FIG. 2, having the same conductivity type as island 11, surrounding the opposite conductivity diffusion 21. The surface concentration of the channel stop is elevated with respect to that of the island and is made high enough so that it does not invert under worst case conditions. In order not to limit breakdown the channel stop region is spaced apart from region 21, which increases device occupation area and thus reduces integration density.